Importance of IP Assembly Is Ever Growing

Despite there being a worldwide recession in full effect the demand for portable multi function devices is growing massively. There are three main benefits that SOC brings that makes them desirable to use with mobile devices. Size, Functionality and Energy consumption. In order to maximise the number of features and range of functionality of these devices and to extend the battery life as far as possible manufacturers turn to SOC or system on chip designs. The variety of SOC designs are multiplying in line with the devices. Every new iteration brings with it new features that require new chip designs to handle them optimally. Of course it is not practical nor is it economically viable to build a new chip design from scratch every time a new variant of the iPhone comes out. This is where IP assembly comes into play. Most system on chip designers will take previously established intellectual property and recombine or restructure it to create additional functionality. Generally the IP assembly will be made up from the companies own stock of IP and sometimes IP licensed from external companies, depending on the companies intention and size. The IP can be thought of as being stored in blocks like Lego. Each block represents a separate functionality. These blocks can be attached together to create a larger construction that has all the functionality of the blocks it contains. While this method is generally more cost effective than designing a whole chip from the ground up it is quite a bit more difficult than simply sticking pieces of Lego together. This can be seen in the amount of hardware changes that are generally made with IP assembly chips. They are very limited. Many companies take fully fledged chip designs and apply almost no hardware changes and instead focus on streamlining the interface programming. The idea is to focus on niche use and ensure a product that works best for its intended function rather than trying to create SOC's that provide totally unique or unprecedented functionality. The chip would be then sold on the few features that differentiate it from the rest of the chips that share the majority of its design. Considering the huge effort required to ensure each of the IP 'blocks' in the IP assembly process communicate with each other properly. It is not necessarily clear that the verification process is lessened any by using existing IP. Since IP assembly has become such a commonplace practice IP integration platforms have been developed to assist the planning of the IP assembly process. These can save not only on time but also on costs by reducing the likelihood of expensive respins being needed. As these systems become more effective and efficient they will allow manufacturers to integrate ever more complex IP at ever lower cost. They can also increase the robustness of chip designs by sorting and logging errors in previous designs and highlighting where they may occur in later designs. With SOC design continuing at pace IP assembly seems to be a distinct area of industry growth.

Gene Baker is an author of articles in a variety of areas including IP assembly. See http://www.duolog.com for more information on IP assembly.